TOPIC 2.2

The Semiconductor Value Chain

⏱️30 min read
📚Core Concept

TOPIC 2.2

The Semiconductor Value Chain

⏱️25 min read

📚Industry Structure

The semiconductor industry operates through a highly specialized and complex value chain that has evolved from vertically integrated companies into a sophisticated global ecosystem. Understanding this value chain is essential to grasping how modern chips— from smartphone processors to AI accelerators— are designed, manufactured, and brought to market.

🔗 Semiconductor Ecosystem Value Chain

Equipment & Materials

ASML Applied Materials Lam Research Tokyo Electron KLA SUMCO Shin-Etsu

Foundries

TSMC (70%) Samsung Intel Foundry SMIC GlobalFoundries

Packaging & Assembly

ASE Technology Amkor JCET SPIL

Fabless / OEMs

Apple NVIDIA AMD Qualcomm Broadcom

Flow: Equipment suppliers → Foundries (wafer fabrication) → OSAT (packaging/testing) → Fabless/OEMs (final products)

The Evolution of Business Models

IDM: The Traditional Vertical Integration Model

Historically, semiconductor companies operated as Integrated Device Manufacturers (IDMs), controlling the entire process from design through manufacturing to distribution. Companies like Intel, Samsung, and Texas Instruments exemplified this model, investing heavily in both R&D for chip design and capital-intensive fabrication facilities (fabs).

However, the IDM model requires massive capital expenditure. Building a leading-edge fab can cost $15-20 billion, and the equipment inside— particularly lithography machines— can cost hundreds of millions of dollars each. This capital intensity created significant barriers to entry and constrained innovation.

The Fabless Revolution: Design Without Fabs

In the 1980s, a revolutionary business model emerged: the fabless semiconductor company. These companies focus exclusively on chip design and marketing, outsourcing all manufacturing to specialized foundries. This model was enabled by the rise of pure-play foundries like Taiwan Semiconductor Manufacturing Company (TSMC), founded in 1987.

The fabless model offers several critical advantages:

  • Capital Efficiency: Companies avoid the billions required for fab construction, allowing them to focus resources on R&D and innovation
  • Flexibility: Fabless companies can leverage the latest manufacturing processes from foundries without building their own facilities
  • Specialization: Design teams can concentrate on architectural innovation and market-specific optimization
  • Speed to Market: By partnering with foundries that already have proven processes, fabless companies can bring products to market faster

Today's leading fabless companies include NVIDIA (AI accelerators and GPUs), Qualcomm (mobile processors), AMD (CPUs and GPUs), Apple (custom silicon), and Broadcom (networking chips).

🍰 Foundry Market Share (Q2 2025)

TSMC

70.2%

Samsung

7.3%

SMIC

5.1%

GlobalFoundries

4.8%

Others

12.6%

TSMC's dominance at advanced nodes creates critical dependency for fabless companies

Pure-Play Foundries

TSMC: The 70% Market Leader

TSMC dominates with approximately 70.2% market share (Q2 2025), manufacturing for Apple, NVIDIA, AMD, Qualcomm, and hundreds of other customers. TSMC's technological leadership at advanced nodes (3nm, 2nm) and massive scale give it near-monopoly status for cutting-edge logic chips.

Samsung, Intel, and the Competition

Samsung Foundry holds approximately 7.3% market share, offering advanced processes and serving both external customers and Samsung's own semiconductor divisions. Samsung is aggressively pursuing GAAFET technology at 2nm to challenge TSMC's dominance.

Intel Foundry Services (IFS) represents Intel's attempt to open its fabs to external customers. Intel is executing an ambitious "five nodes in four years" strategy to regain process leadership with its 18A (1.8nm) node featuring RibbonFET (GAA transistors) and PowerVia (backside power delivery).

Specialized Foundries: GlobalFoundries and SMIC

GlobalFoundries deliberately opted out of the bleeding-edge race, focusing instead on "differentiated technologies" for automotive, IoT, and communications. Its 22FDX platform and specialized processes serve customers who prioritize features and reliability over raw transistor density.

SMIC (Semiconductor Manufacturing International Corporation), China's national champion, holds approximately 5.1% market share. Despite US export controls limiting access to EUV lithography, SMIC has achieved remarkable breakthroughs using DUV multi-patterning to manufacture 7nm-class chips.

Backend Operations

OSAT Providers: From Commodity to Strategic

After wafer fabrication, chips must be packaged, assembled, and tested. OSAT (Outsourced Semiconductor Assembly and Test) providers have transformed from commodity service providers into strategic partners as advanced packaging becomes critical for AI and HPC applications.

Advanced Packaging Technologies

Key advanced packaging technologies include:

  • CoWoS (Chip-on-Wafer-on-Substrate): TSMC's technology for integrating large GPUs with High-Bandwidth Memory (HBM) stacks, essential for AI accelerators
  • SiP (System-in-Package): Integrating diverse components (RF, power management, processors) into single modules
  • 3D Stacking: Vertically integrating multiple dies for increased density and performance

Leading OSAT companies include ASE Technology Holding (world's largest), Amkor Technology (building advanced packaging campus in Arizona), and JCET Group (China's leading OSAT).

The Equipment and Materials Bedrock

Lithography: ASML's EUV Monopoly

ASML (Netherlands) holds a monopoly on EUV lithography systems ($370M per High-NA EUV machine). These machines are absolutely essential for manufacturing chips at 7nm and below, making ASML a critical geopolitical player.

Deposition, Etch, and Process Control

Applied Materials (US) is the market leader in deposition and etch equipment. Lam Research (US) specializes in deposition and etch, critical for 3D NAND and GAA logic. Tokyo Electron (Japan) is strong in coater/developer systems and etch. KLA (US) is the undisputed leader in process control, metrology, and inspection.

Silicon Wafers and Raw Materials

Five companies control the majority of silicon wafer supply: Shin-Etsu Chemical (Japan), SUMCO (Japan), GlobalWafers (Taiwan), Siltronic (Germany), and SK Siltron (South Korea). 300mm diameter wafers account for over 63% of the market by revenue.

Strategic Implications

The value chain's specialization creates deep interdependencies and concentration risks:

  • Fabless companies depend entirely on foundry capacity, creating vulnerability to allocation shortages
  • Foundries depend on ASML for EUV equipment and other suppliers for critical tools
  • Equipment makers face geopolitical pressure as their tools become instruments of foreign policy
  • Geographic concentration: Advanced manufacturing concentrated in Taiwan (TSMC), with advanced packaging historically in Asia

This ecosystem efficiently delivers innovation but concentrates systemic risk in a few chokepoints— particularly TSMC for advanced manufacturing and ASML for EUV lithography.

🎯 Key Takeaways

  • The semiconductor industry evolved from vertically integrated IDMs to a specialized ecosystem of fabless designers, pure-play foundries, OSAT providers, and equipment/materials suppliers
  • The fabless model (NVIDIA, Qualcomm, AMD, Apple) enables capital-efficient innovation by partnering with foundries (TSMC 70% market share) that specialize in manufacturing excellence
  • Advanced packaging (CoWoS, SiP, 3D stacking) has evolved from commodity service to critical enabler for AI/HPC, with companies like ASE and Amkor investing billions in new capacity
  • ASML's EUV monopoly and the oligopoly in deposition/etch equipment create geopolitical leverage points and export control battlegrounds

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